Fundamentals of ALD course – 6-7 June 2024, University of Bath, UK

The "Fundamentals of ALD" course, scheduled for June 6-7, 2024 at the University of Bath, UK, targets newcomers and professionals seeking to deepen their understanding of atomic layer deposition (ALD). It will cover the theoretical and practical aspects of ALD, including surface chemistry, process configurations, reactor design, and material properties. Professors Gregory Parsons, Seán Barry, and Erwin Kessels will lead the course, offering both foundational insights and advanced techniques relevant to laboratory and industrial applications.

The course will run from noon-to-noon across two days, featuring seven detailed lectures interspersed with Q&A sessions and a mixer event on the first evening. Registration is open until May 24, 2024, with fees varying for industry professionals, academia members, and students. The event will take place in the “6 West South” building at the University of Bath, and participants are advised to arrange their own accommodation, with several hotel suggestions provided near the venue.

Link: Fundamentals of ALD course –  6-7 June 2024, University of Bath, UK – ALDAcademy

ASM a revenue of €639 million Q12024 - driven significantly by sales in Atomic Layer Deposition (ALD) and Epitaxy (Epi) technologies.

Here are the key points from ASM International NV's financial results for the first quarter of 2024:

The company reported a revenue of €639 million, at the upper end of their guidance, driven significantly by sales in Atomic Layer Deposition (ALD) and Epitaxy (Epi) technologies.

The foundry and memory segments were the leading contributors to revenue. While the combined logic/foundry segment saw a decline year-over-year, it improved from the previous quarter. The automotive semiconductor market showed weakness, whereas the memory market is showing signs of recovery.

• Gross margin increased to 52.9%, largely due to strong sales performance in the Chinese market.
• New orders reached €698 million, marking a 10% increase from the previous year, mainly driven by the foundry sector. The company expects continued demand for gate-all-around technology, with significant orders anticipated in the second half of the year.
• Despite a slowdown in certain segments like power/analog/wafer, ASM International maintains a strong financial position with a cash reserve of €720 million at the end of the quarter. Sales in China are expected to remain robust.

Samsung Sets New Industry Standard with 290-Layer V9 NAND employing mutli stack etch - Plans for 430-Layer Chips

 Samsung Electronics has initiated mass production of its 9th-generation 1Tb TLC vertical NAND (V-NAND), marking a significant advancement in memory technology. This new generation features the smallest cell size yet, improving bit density by approximately 50% over the previous generation. Innovations like cell interference avoidance and life extension techniques have been introduced to enhance reliability and product quality. By eliminating dummy channel holes, Samsung has also effectively reduced the memory cells' planar area, further emphasizing their commitment to leading the high-density, high-performance solid-state drive (SSD) market, particularly for AI applications.

Competitive situation in 3D NAND Flash technology (Golem.de)

One standout feature of the 9th-generation V-NAND is Samsung's advanced "channel hole etching" technology. This process involves stacking mold layers and simultaneously drilling through them, allowing for the creation of electron pathways through the industry's highest cell layer count in a double-stack structure. As the number of layers increases, so does the complexity of the etching process, necessitating more sophisticated techniques to efficiently pierce through these higher numbers. This technology not only showcases Samsung's process capabilities but also maximizes fabrication productivity, cementing its position as a leader in the SSD market.

According to Golem, Samsung's latest QLC-V9 memory chip outpaces its competitors in the NAND flash market with a groundbreaking 280-layer configuration that enhances SSD capacity, cost-efficiency, and speed. With a storage density of 28.5 GBit/mm², Samsung surpasses major rivals like YMTC and Micron, who report densities of 20.63 and 19.5 GBit/mm² respectively, and even outperforms Intel's upcoming 192-layer PLC-NAND. This technical superiority not only sets a new benchmark for memory chip performance but also enables Samsung to potentially introduce the first 8 TB single-sided M.2 SSDs, a significant advancement over current double-sided designs. The increase in interface speed to 3.2 GBit/s from the previous 2.4 GBit/s promises enhanced read speeds close to those of high-end SSDs, although improvements in write speed are yet to be detailed.

Market share, Q4 2023 (TrendForce)

Samsung Electronics is set to escalate its lead in the NAND flash memory market by starting mass production of its 290-layer ninth-generation (V9) vertical NAND chips, which promise enhanced performance for enterprise servers and AI and cloud devices. Building on its dominance since 2002, Samsung is also planning to introduce even more advanced 430-layer NAND chips next year to meet the growing demand for high-performance and large storage solutions in the AI era. This move is part of a broader competitive landscape where major chipmakers like SK Hynix and YMTC are also pushing forward with high-density NAND products, with SK Hynix planning to start producing 321-layer NAND chips early next year and YMTC set to unveil 300-layer chips later this year. Samsung's aggressive investment in NAND technology aims to develop chips with over 1,000 layers by 2030, highlighting the intensifying race among global chipmakers to innovate in chip stacking technology to cut costs and improve performance.

Sources: 

Samsung Electronics Begins Industry's First Mass Production of 9th-Gen V-NAND | Samsung Semiconductor Global

Rekord bei Speicherdichte: Samsungs QLC-V9-Speicherchip schlägt alle Konkurrenten - Golem.de

Samsung to produce 290-layer V9 NAND to win chip stacking war - KED Global

Linköping University Researchers Pioneer the Synthesis of 'Goldene - a Monolayer Gold Material

Researchers form Linköping University, Sweden, publish a novel method for synthesizing "goldene," a monolayer of gold, achieved by etching away Ti3C2 from a nanolaminated Ti3AuC2 structure using a hydrofluoric acid-free process. The Ti3AuC2 was initially formed by substituting Si in Ti3SiC2 with Au, utilizing a unique aspect of MAX phases—materials characterized by their layered structures and the ability to etch away specific layers. This process not only highlights a new avenue in the synthesis of 2D materials but also overcomes the limitations of previous methods that often required more complex and less environmentally friendly chemicals. The resulting goldene exhibits a lattice contraction of about 9% compared to bulk gold, confirmed via electron microscopy, with further characterization showing an increase in the Au 4f binding energy by 0.88 eV, suggesting altered electronic properties.

Graphical abstract. (From: Synthesis of goldene comprising single-atom layer gold)

The practical implications of goldene extend to various advanced technological applications. Its high surface-area-to-volume ratio, a characteristic of two-dimensional materials, could significantly enhance its catalytic and electronic properties. Applications in fields such as electronics, catalysis, and medicine are discussed, with potential uses ranging from improved catalytic converters to novel approaches in cancer treatment through photothermal therapies. The intrinsic stability of goldene, supported by ab initio molecular dynamics simulations, suggests that despite some physical challenges like curling and agglomeration, the material holds substantial promise for the development of next-generation devices and systems.

The production of atomically thin gold layers in the past typically involved methods that produce few atoms in thickness rather than true monolayers and often required complex supporting substrates or matrices to stabilize the gold layer. The method of exfoliating gold from a nanolaminated MAX phase as described in the publication is a novel approach, potentially opening new pathways for the production and application of gold in nanotechnology and materials science.

 

Schematic illustration of the preparation of goldene. (From: Synthesis of goldene comprising single-atom layer gold),

The production process of goldene is scalable and could potentially be adapted for the synthesis of other non-van der Waals 2D materials. The study outlines further research avenues, including the exploration of different etching schemes and surfactants to enhance the stability and yield of the synthesized layers. The success in manipulating the atomic structure of gold at such a fundamental level not only paves the way for innovative applications but also deepens our understanding of material science at the atomic scale, opening doors to new research in 2D material science.

Source: Synthesis of goldene comprising single-atom layer gold | Nature Synthesis

Intel's Strategic Leap with 14A Node and DSA: Pioneering Next-Gen Semiconductor Manufacturing

Semi Analysis recently published a deeper dive into of Directed Self Assembly (DSA) and prospects of Intel using it at their 14A node (Link below). Intel's latest efforts in semiconductor manufacturing have brought considerable attention to its 18A node, yet it's the 14A node that is most important according to the analysis for the success of Intel Foundry's IDM 2.0 strategy. While the industry watches the ongoing discussions around the merits of TSMC's N2 and Intel’s 18A technologies, Intel is quietly setting a foundational stage with its 14A node, aiming to solidify customer trust and secure critical, high-value chip projects for the future. A key element in Intel's strategy may be the adoption of DSA that could significantly reduce lithography costs. DSA utilizes the self-organizing properties of block copolymers (BCPs) that assemble into predetermined patterns when guided by an underlying template. This approach promises to lower the doses required in extreme ultraviolet (EUV) lithography, allowing for more efficient patterning at reduced costs.

However, integrating DSA into commercial manufacturing involves challenges such as defectivity and pattern limitations, which could hinder its adoption. So I looked more into historical patent filings and found that reveal a typical hype cycle with increased filings during periods of peak expectations, followed by a decline as practical challenges emerged. Intel and TSMC have been consistently filing DSA patents, indicating sustained investment and belief in DSA's potential. Merck, among other chemical suppliers, has significantly increased patent filings, aligning with technological advancements in DSA. Please find on overview below.

It is well known that Intel plans to be the first major company to implement ASML’s high-NA EUV lithography scanners in high volume, despite the higher costs associated with single exposure high-NA systems compared to low-NA double patterning. It was also recently reported on X and other places that ASML is delivering a High-NA System to another player. SemiAnalysis argues that, the economic challenge posed by high-NA technology is addressed through the integration of DSA, which can improve the final pattern quality and dramatically reduce the necessary dose, thus potentially making high-NA economically more viable.

The benefits of DSA are significant: 

• The ability to produce finer features with lower line edge roughness and increased throughput, thanks to its ability to heal discrepancies in the EUV guide patterns. 
• Substantial cost savings and improved yield, especially for layers critical to the performance of advanced logic chips (bigger dies like AI accelerators).

However, DSA's integration into a commercial manufacturing environment is not without risks. The risks associated with Intel's adoption of DSA include:

• The primary risk with any new patterning technology is defectivity, for DSA it is linked to the chemical purity of the block copolymers (BCP). Synthesizing BCP to extremely high purities is challenging, and any inhomogeneity directly impacts the critical dimension (CD), leading to defects. Trace metals need to be below 10 parts-per-trillion, and filtering out organic impurities is difficult, impacting the viability of DSA for mass production. My assessment - Expect this to come from a MERCK or a Japanese chemical vendor.
• DSA is inherently limited to producing 1D line/space patterns or contact hole arrays, restricted to a single pitch per layer. This complicates the integration with other process technologies that might require more diverse patterning capabilities. However, these issues have potential solutions similar to those used in multi-patterning schemes.
• Despite the theoretical benefits and recent advances in DSA, it remains largely untested in high-volume, leading-edge manufacturing. Intel is pioneering the use in high-NA scenarios, but the broader adoption across the industry, including by competitors like TSMC who are also developing DSA, remains uncertain. 

Source: Intel’s 14A Magic Bullet: Directed Self-Assembly (DSA) (semianalysis.com)

So let´s do the Patbase Test - how does this hold out if we dig into historical and current patent filing by the suspects!

Yes indeed, we have seen much increased filing the past decade or so representing a typical hype cycle. The hype cycle is a model developed by Gartner that describes the progression of a technology from inception to widespread adoption and maturity. It typically consists of five phases: the Technology Trigger, Peak of Inflated Expectations, Trough of Disillusionment, Slope of Enlightenment, and Plateau of Productivity. So for DSA in semiconductor manufacturing, the technology first garnered attention when its potential applications in advanced lithography were identified (2000-2010), marking the Technology Trigger. Interest surged about 2011, leading to a Peak of Inflated Expectations around 2016/2017, evidenced by a spike in patent filings as companies raced to capitalize on the emerging technology. However, as practical and economic challenges such as defectivity and integration complexities became evident, the enthusiasm waned, and DSA entered the Trough of Disillusionment. During this phase, the technology's limitations led to a decline in interest as initial expectations were not met. Over time, as more sustainable applications and improvements are developed, DSA may progress into the Slope of Enlightenment, where understanding and optimization occur as described in the assessment by SemiAnalysis, before finally reaching the Plateau of Productivity in the years to come, where it becomes a standard part of semiconductor manufacturing processes. This progression through the hype cycle reflects the typical maturation path of innovative technologies in the industry. Please note that there is a delay in patent filing data of up to 18 months so 2022, 2023 and 2024 are not complete yet.

Patent filing since 2000 in DSA (Patbase, 2024-04-19)

2. Yes, Intel is actively filing DSA patents and in the lead, and so is TSMC, along with other key players in the ecosystem. Over the past decade, the pattern of DSA patent filings has been quite revealing. Initially, GlobalFoundries and IBM in Upstate New York were early filers. GlobalFoundries ceased their filings around the time they decided not to pursue 7 nm and nodes below. IBM also stopped filing after completing their 2 nm demonstration on 300 mm wafers in 2021. Main contenders Intel and TSMC have been consistently filing DSA patents throughout the hype cycle and have continued to do so. Notably, there has been a clear acceleration in Intel's patent filings since 2019, although there was a slight drop during the COVID-19 lockdowns. Looking at chemical suppliers, Merck has taken the lead, with increased filings beginning in parallel with Intel from 2019 onwards, and accelerating until today. Other suppliers such as JSR, Shin-Etsu, and Brewer Science are also active in the DSA space. In the segment of wafer equipment OEMs, Tokyo Electron and SCREEN have been dominant. However, SCREEN appears to have recently exited the game.

DSA Patent filing last decade (Patbase , 2024-04-19)

In Summary - good assessment by SemiAnalysis and i passes the Patbase Test!

Ahead of the 50 Years of ALD celebration in Helsinki, learn about the origins, growth and future of the AVS ALD Conference with Greg Parsons and Steve George

The AVS ALD Conference is the main event for those in Atomic Layer Deposition. The 3-day meeting rotates between the US, Europe and Asia, chock full of interesting parallel sessions, an industry exhibition, and a few sponsored extracurricular activities. In August, the ALD conference will return for the first time in 20 years to Helsinki, Finland, the technologys place of origin. 2024 marks 50 years since Tuomo Suntolas original patent application for ALD, and this year we will celebrate the meteoric rise of the atomic scale process. In this exclusive interview from The ALDepartment, Tyler sits down with two of the founding members of the AVS ALD Conference, Professor Greg Parsons from North Carolina State University, and his PhD advisor at the University of Colorado Boulder, Professor Steven George, to talk about the origins, growth and future of the meeting. Greg and Steve discuss the challenges surrounding the conception of the conference, an unexpected letter from a major ALD company, the enormous success of the 1st conference and how they believe the meeting may change in the future. 

In this Interview: 

00:00 Intro 

01:43 How the conference started 

10:00 An unexpected letter from ASM 

12:16 The first AVS ALD conference 

22:37 Growth and direction 

33:12 Future of AVS ALD

42:16 Reflections and favorite conferences

A New Zr Precursor Enhances Wafer-Scale Zirconium Dioxide Films

A new class of Zirconium (Zr) precursor, featuring boratabenzene ligand, has been developed by a team led by Mohd Zahid Ansari at Yeungnam University, enabling the production of highly conformal ZrO2 thin films via Atomic Layer Deposition (ALD). This innovation, detailed in a recent study published in Science Advances, uses tris(dimethylamido)dimethylamidoboratabenzene zirconium and oxygen as reactants to achieve amorphous ZrO2 films at temperatures ranging from 150–350 °C on SiO2/Si substrates.

The new approach decouples the conventional ALD process, enhancing the deposition temperature window and achieving a growth per cycle of 0.87 Å, which surpasses previous methods using different Zr precursors. The films exhibit extreme conformality with complete step coverage, even on substrates with complex topographies, marking a significant advancement in semiconductor fabrication.

This development not only streamlines the manufacturing process by using O2 as a mild oxidant but also promotes safer and more efficient production methods. The films transition into nanocrystalline cubic ZrO2 upon annealing at 850 °C, enhancing their properties for potential use in high-temperature applications and as coatings for optical filters. The research team's breakthrough paves the way for next-generation semiconductor devices with improved performance and reliability.

The use of ZrO2 in DRAM helps in addressing several challenges associated with the miniaturization of memory devices. As device dimensions continue to shrink, traditional silicon dioxide (SiO2) used in older generations of DRAM becomes less effective due to increased leakage currents and decreased reliability. ZrO2, with its higher dielectric constant, allows for greater data storage capacity and improved efficiency without compromising the device's size or power requirements.

Source: New class of Zr precursor containing boratabenzene ligand enabling highly conformal wafer-scale zirconium dioxide thin films through atomic layer deposition - ScienceDirect

SK hynix to Lead in Advanced DRAM Production, Overtaking Samsung with Earlier Start

Korean SK hynix is set to initiate mass production of its advanced 6th generation 10nm class DRAM (node 1c) in the third quarter of this year, ahead of its competitor Samsung Electronics. The move positions SK hynix to potentially lead in the DDR5 server memory market, which is needed for data centers operated by major tech companies. SK hynix has outlined a strategic internal roadmap that includes achieving necessary customer certifications in anticipation of a surge in demand, especially following compatibility approval with Intel's server platforms. This certification is crucial as Intel holds a dominant share in the global server CPU market. 

The DDR5 DRAM from SK hynix is designed to be compatible with Intel CPUs, a significant advantage given Intel’s extensive market presence. Meanwhile, Samsung plans to start its mass production of similar DRAM by the end of the year, having shared its development roadmap at the recent MemCon 2024 conference. Both companies are using leading-edge Extreme Ultraviolet (EUV) lithography in their processes, which enhances chip yield and power efficiency over previous generations.

SK hynix's new M16 DRAM plant in Icheon, Gyeonggi Province / Courtesy of SK hynix

Source: SK hynix Leads with ‘6th Generation 10 nm’ DRAM Production Ahead of Samsung - Businesskorea

Hanwha to supply ALD Equipment for Molybdenum Deposition for Memory Applications

According to Korean media, Hanwha Precision Machinery is developing a new type of thermal atomic layer deposition (ALD) equipment for depositing molybdenum, which is emerging as a superior material for metal gates in next-generation semiconductors due to its lower resistivity and lack of fluoride residue. The new technology, still in the prototype stage and expected to take three years to commercialize, uses molybdenum dichloride dioxide (MoO2Cl2) as a precursor. This initiative marks Hanwha's expansion into the semiconductor fabrication equipment market, collaborating with industry giants like SK Hynix on future projects, including the development of hybrid bonding equipment for high bandwidth memory production.

At two recent conferences, EFDS ALD For Industry and CMC 2024 this week in Phoenix, Air Liquide presented HVM ready solution for MoO2Cl2 sub fab delivery. They also confirmed that it is already in HVM. Other sources claim that Mo is also in HVM for DRAM. However, no reverse engineering is publicly available as of to day.

Air Liquide presenting HVM ready sub fab solution for MoO2Cl2 precursor delivery at EFDS ALD for Industry in Dresden, Germany.

Hanwha developing thermal ALD equipment for deposition of molybdenum - THE ELEC, Korea Electronics Industry Media (thelec.net)

Apple Partners with Taiwanese Largan to Advance iPhone Camera Plastic Lenses Using ALD Technology - Updated

Apple has been replacing the glass lenses in future iPhone cameras with advanced plastic lenses that have successfully passed customer testing. Two years prior, Apple's supplier Largan invested heavily in ALD (Atomic Layer Deposition) deposition machines specifically for this purpose, costing over $13.9 million each. This investment paid off with significant business from the coating of lenses for the iPhone 15 series, which introduced a periscope lens in its Pro model—a first for iPhones.

Looking ahead, there's anticipation that these new plastic lenses might feature in the iPhone 16 or 17. Largan's chairman, Lin Enping, confirmed the successful testing of a new plastic film, though it remains uncertain if it will be ready for the next iPhone release. This transition to plastic could potentially enhance camera durability, particularly by reducing lens flare and protecting the lenses from damage in case of a fall.

Speculation abounds that Apple might be the customer Lin referred to, although he did not specify. Market analysts highlight that a move to plastic lenses would not only signify a significant technological shift but also align with Apple's ongoing innovation in camera technology.

Update: Apple has used plastic lenses up to and including the iPhone 15 line-up – with one exception. The tetraprism lens used in the iPhone 15 Pro Max is a glass-plastic hybrid known as 1G3P – that is, one glass element, three plastic. This is a compromise designed to bring some of the quality gain from a glass element, without the disadvantages of an all-glass design. Many of the elements in a lens are there purely to correct for various types of distortion. Using at least one glass element eliminates some of those distortions, allowing for fewer elements. Apple's Glass And Plastic Hybrid Lens In The iPhone 15 Pro Max Will Spark A Trend For The Competition To Follow (wccftech.com)

The iPhone 16 Pro is tipped to receive the 5x optical zoom tetraprism lens currently available only on the largest iPhone 15 Pro Max model. This lens will bring Apple’s current most powerful zoom capabilities to the smaller of the two Pro models. However, according to another rumor from last year, the iPhone 16 Pro Max may pull ahead again with an even stronger “ultra-long” telephoto camera. New Apple Leak Reveals Major iPhone 16 Pro Camera Upgrade (forbes.com)

Largan Precision Co., Ltd., based in Taiwan, is a leading manufacturer of optical lens modules, primarily for smartphones and cameras. Renowned for supplying high-quality camera lenses for Apple's iPhone, Largan specializes in high-end lens modules. The company has invested heavily in advanced technologies such as atomic layer deposition (ALD) to enhance lens durability and image quality. Largan's significant production capacity and commitment to innovation make it a key player in the optics industry, pivotal in advancing smartphone camera technology. This role is critical for meeting the high demands of major smartphone manufacturers like Apple.

Source: Apple Seeks to replace Glass Lenses in Future iPhone Cameras with next-gen Plastic Lenses that have already passed customer testing - Patently Apple

Kokusai Electric Showcased Batch ALD Technology for 40-28nm Nodes at SEMICON China 2024

At SEMICON China 2024, Kokusai Electric Corporation emphasized its strengths in atomic layer deposition (ALD) technology. The company showcased its batch-type ALD systems, which are particularly adept at achieving high-quality, uniform film deposition on multiple wafers simultaneously. This technology ensures excellent film thickness control and good step coverage, crucial for advanced semiconductor manufacturing. As the Chinese market increasingly transitions from chemical vapor deposition (CVD) to ALD due to its precision, Kokusai is poised to meet this rising demand, especially in fields like 3D stacking and miniaturization.

Kokusai highlighted its ALD technology specifically for mature semiconductor technology nodes in the 40 to 28nm range at SEMICON China 2024. This focus addresses the growing demand for precise film quality in these specific nodes within the Chinese market.

Source: Kokusai Electric Zeroes in on Film Quality Improvement | AEI (dempa.net)

Rémi Maillat's Watch Brand Launches €145,500 Titanium Timepiece with Nature-Inspired, ALD-Coated Green Dial

The watchmaker founded by Rémi Maillat in 2017 reveals its deep connection with nature with a bold monochromatic titanium timepiece. The spiral dial motif is covered in a shade of green, inspired by both the glowing aurora borealis and the green meadows of spring. The striking colour was achieved using the ALD (Atomic Layer Deposition) coating method, in which the craftsmen deposited extremely thin layers of copper oxide, which interacted with light to create this distinctive hue. Priced at €145,500, it is a testament to craftsmanship and innovation in the world of horology.

KRAYON PRESENTS 

« ANYWHERE AURORA » 

THE FIRST TITANIUM WATCH BY KRAYON

A new colour, Green. Like the reflection with our intimate relationship with nature. A Limited Edition of only 25

Lovers of green rejoice. It's a green that evokes the powerful phenomena of nature. The skies that become fluorescent with the hypnotic northern lights. But also, the first days of spring with the rebirth of fertile soil. It can also be the green that evokes fresh grass after rain, lush meadows, forests, valleys, and that need for wide-open spaces that inspires us to embark on adventure. It’s a colour that heralds a feeling of renewal, of optimism and a new, organic energy directly linked with our natural universe – surprising yet self-evident, as if it had always been part of Krayon’s spirit since its foundation only six years ago.

The brand founded by Rémi Maillat in 2017 has a profound connection to nature. This connection is manifest in its hallmark complication: a personal and intimate ephemeris. Until now, this theme has consistently been presented in various shades of blue, often drawing inspiration from reflections on water surfaces. Today, for the first time, KRAYON boldly explores a new palette and combines it with a new, lighter, more modern metal: Grade 5 titanium.

Anywhere Aurora | Krayon

Applied Materials Pioneer® CVD film for EUV Sculpta and DRAM Sym3 Etch applications

Applied Materials continues to lead in semiconductor technology with its introduction of the Producer® XP Pioneer® CVD patterning film at the SPIE Advanced Lithography + Patterning conference. This latest innovation is critical for DRAM scaling and EUV lithography, offering improved etch selectivity and pattern fidelity due to enhanced film density and stiffness. Optimized for use with the Sculpta® pattern-shaping system, Pioneer allows for advanced patterning capabilities, crucial for maintaining precise feature dimensions. With its adoption by leading foundry-logic and memory manufacturers, the Pioneer system is set to significantly enhance Applied Materials' portfolio and revenue, affirming its leadership in CVD technologies.

Applied Materials' Draco™ hard mask and Sym3® Y HT etch system have revolutionized DRAM production by enabling the etching of perfectly cylindrical capacitor holes, significantly enhancing etch selectivity and improving critical dimension uniformity, which contributes to a notable increase in the company's market share in DRAM.

Demand for DRAM innovation continues to grow to feed the insatiable need for memory bandwidth in the AI era. The recently launched Pioneer CVD patterning film has already been adopted by leading memory manufacturers for DRAM patterning. Pioneer is a completely new CVD architecture based on a unique high-density carbon formula that is more resilient to etch chemistries used in the most advanced process nodes, permitting thinner film stacks with superior sidewall feature uniformity.

A thinner hard mask means less vertical distance is required for etch, resulting in a lower aspect ratio. This allows use of lower-power plasma and offers better control of the ratio of ions to radicals. A higher concentration of ions produces more efficient etches with better control, allowing desired patterns to be transferred to the wafer with exceptional fidelity. Pioneer is also being co-optimized with Applied’s new Sym3® Y Magnum® etch system to provide better control over conventional carbon films for critical etch applications in memory processing.

For EUV Lithography the Pioneer CVD patterning film developed by Applied Materials addresses the stringent demands of EUV lithography by increasing film density and stiffness, which enhances etch selectivity and allows for finer pattern control, vital for the ultra-fine dimensions required in advanced chip manufacturing.

Source: Building on an Unmatched Foundation of CVD Innovation (appliedmaterials.com)

AlixLabs announces EU-wide APS Trademark and nearing commercialization on 300-millimeter wafer equipment

The European Intellectual Property Office grants Swedish semiconductor startup registration of the phrase APS (ALE Pitch Splitting).

Lund, Sweden – April 5th, 2024, AlixLabs AB, a Swedish semiconductor startup specializing in Atomic Layer Etching, announces that it has been granted a certification of registration for its trademark APS by the European Union Intellectual Property Office. The acronym APS stands for Atomic Layer Etching (ALE) Pitch Splitting and describes the company’s revolutionary process that aims to enable the semiconductor industry produce chips of the future at Ångström scale (1Å = 0.1 nanometer) at lower cost and energy use.

Jonas Sundqvist, CEO of AlixLabs (top) and Thomas Engstedt CEO of Nanovac and Dmitry Suyatin CTO of AlixLabs (Bottom).

“As we are nearing commercialization of our technology on 300-millimeter (12-inch) silicon wafers, it feels great to finally have a unique trademark to our unique semiconductor manufacturing process,” comments Jonas Sundqvist, CEO of AlixLabs. “We have been etching transistor fins since 2019, and within the upcoming quarters we will have fully validated the APS process on 300-millimeter wafers with new equipment developed by our fellow countrymen at Nanovac.”

Having previously demonstrated APS on bulk silicon, AlixLabs aims to install the new Nanovac-developed equipment in the summer of 2024. Once up and running, the goal is to finalize a commercial APS process that can be licensed to leading-edge semiconductor manufacturers to enable cheaper, more energy-efficient and sustainable production of advanced chips.

“This 300-millimeter wafer tool combines our deep industry knowledge with practical design innovations, aiming to offer improved precision and efficiency in semiconductor manufacturing,” says Thomas Engstedt, founder and CEO at Nanovac. “It’s a disruptive step forward for Atomic Layer Etching and APS processing, setting a solid foundation for future advancements by employing modular design concepts.”

APS is the first trademark of AlixLabs, joining the company’s growing portfolio of patents related to the APS process that includes one EU, two U.S., and two Taiwanese patents.

About AlixLabs

Established in 2019 in Lund, Sweden, AlixLabs emerged as a spin-off from Lund University with a mission to enable the cost-effective and energy-conscious fabrication of semiconductors, particularly logic and memory components. AlixLabs boasts patented recognition for its groundbreaking APS technique, a process that achieves nanostructure division through etching. This method holds approved patents across the USA, Taiwan, and Europe. The APS acronym signifies ALE Pitch Splitting, leveraging ALE (Atomic Layer Etching), a plasma-based dry etching cyclic methodology. For more details, please visit www.alixlabs.com

Surfs are going to be up at the PRiME Symposium G01 on ALD & ALE Applications 20, in Honolulu | Oct. 6-12, 2024

Every four years, the PRiME Joint International Meeting is held under the auspices of the Electrochemical Society (ECS), joint with its sister Societies of Japan and Korea. This fall, PRIME 2024 will be held on Oct. 6-11, 2024 in Honolulu, Hawaii, and is expected to gather over 4000 participants and 40 exhibitors from both academia and industry.

The conference has a strong focus on emerging technology and applications in both solid-state science & technology and electrochemistry.

General information and the Meeting Program can be found here: CALL FOR PAPERS.

The organizers of symposium G01 on “Atomic Layer Deposition & Etching Applications, 20” encourage you to submit your abstract(s) on topics, comprising but not limited to:

1. Semiconductor CMOS applications: development and integration of ALD high-k oxides and metal electrodes with conventional and high-mobility channel materials;

2. Volatile and non-volatile memory applications: extendibility, Flash, MIM, MIS, RF capacitors, etc.;

3. Interconnects and contacts: integration of ALD films with Cu and low-k materials;

4. Fundamentals of ALD processing: reaction mechanisms, in-situ measurement, modeling, theory;

5. New precursors and delivery systems;

6. Optical, photonic and quantum applications; applications aiming at Machine Learning, Artificial Intelligence

7. Coating of nanoporous materials by ALD;

8. Molecular Layer Deposition (MLD) and hybrid ALD/MLD;

9. ALD for energy conversion applications such as fuel cells, photovoltaics, etc.;

10. ALD for energy storage applications;

11. Productivity enhancement, scale-up and commercialization of ALD equipment and processes for rigid and flexible substrates, including roll-to-roll deposition;

12. Area-selective ALD;

13. Atomic Layer Etching (‘reverse ALD’) and related topics aiming at self-limited etching, such as atomic layer cleaning, etc.

FYI: Last year in Gothenburg, our symposium G01 on ALD & ALE Applications 19 attracted a record number of 78 presentations, composing a full 4-day schedule of 66 oral (of which 18 invited), plus 12 poster presentations.

We will traditionally attract more attendants from Far East and expect to be as successful this fall in Hawaii.

Abstract submission

Meeting abstracts should be submitted not later than the deadline of April 12, 2024 via the ECS website: Submission Instructions

Invited speakers

List of confirmed invited speakers (from North America, Asia and Europe):

1. Bart Macco, TU Eindhoven, Netherlands, Review of ALD for solar cells

2. Maarit Karppinen, Aalto University, Finland, ALD/MLD for energy / membrane technology

3. Chad Brick, Gelest, USA, Silanes and silazanes precursors for Area Specific Deposition

4. Makoto Sekine, Nagoya Univ., Japan, Low damage ALE of AlGaN

5. Rong Chen, HUST Univ. Wuhan, China, ALD for Cataysis and other applications

6. Mikhael Bechelany, IEM, Montpellier, France, Recent Advancements and Emerging Applications in ALD on High-Porosity Materials

7. Miika Mattinen, Univ Helsinki, Finland, ALD of dichalcogenides for electrocatalysis

8. Bonggeun Shong, Hongik University, Korea, Theory of area-selective ALD

9. Miin-Jang Chen, National Taiwan Univ., Inhibitor-free Area-Selective ALD

10. Hyungjun Kim, Yonsei University, Korea, ALD of “Group 16 Compounds” for Emerging Applications (2D TMDCs)

11. Agnieszka Kurek, Oxford Instruments, United Kingdom, Faster ALD for Emerging Quantum Applications

12. Matthew Metz, Inte, USA, Keynote on "Materials Challenges in Future Semiconductor Devices"

13. Junling Lu, University of Science and Technology of China, ALD for Catalysis

14. Sung Gap Im, KAIST, Korea, Vapor-phase Deposited Functional Polymer Films for Electronic Device Applications

15. Jason Croy, Argonne National Lab, USA, Next-gen batteries & ALD

16. Mark Saly, Applied Materials, USA, Key Challenges in Area Selective Deposition: from R&D Scale to High Volume Manufacturing

Visa and travel

For more information, see: VISA AND TRAVEL INFORMATION

In addition, Mrs. Francesca Spagnuolo at the ECS (Francesca.Spagnuolo@electrochem.org) can provide you with an official participation letter issued by the Electrochemical Society.

For (limited) general travel grant questions, please contact travelgrant@electrochem.org.

We are looking forward to meeting you all at our symposium G01 on ALD & ALE Applications 20, in Honolulu | Oct. 6-12, 2024 !

Laser Slicing Technique Revolutionizes GaN Substrate Recycling, Paving the Way for Cost-Effective Vertical Power MOSFETs

A study led by Takashi Ishida and colleagues explored a recycling process for gallium nitride (GaN) substrates using a laser slicing technique, aiming to reduce the cost of GaN vertical power MOSFETs. GaN is noted for its potential in high-power applications due to its superior electrical properties compared to silicon. The cost of GaN devices, while expected to be lower than silicon carbide (SiC) devices, is significantly impacted by the expensive GaN substrates. The proposed recycling process involves the use of laser slicing to separate used GaN substrates into thin device chips and a remaining substrate portion, which can then be smoothed, polished, and reused for further device fabrication.

The research demonstrated that the electrical properties of devices fabricated on recycled GaN substrates, specifically lateral MOSFETs and vertical PN diodes, showed no degradation compared to those on new substrates. This indicates that the recycling process does not adversely affect the substrate's quality or the performance of subsequent devices. The study's findings suggest that this recycling method could be a viable strategy to lower the production costs of GaN-based power devices, potentially facilitating their broader adoption in high-power applications.

Source: Demonstration of recycling process for GaN substrates using laser slicing technique towards cost reduction of GaN vertical power MOSFETs - IOPscience

Tokyo Electron ALD of AlN Thin Films Report Unprecedented Uniformity on Large Batch 200 mm Tool

In the rapidly evolving world of semiconductor technology, achieving high uniformity in thin films is important for enhancing production yield and device performance. In a study led by Partha Mukhopadhyay and his team at Tokzo Electron has made significant strides in this domain, using ALD of aluminum nitride (AlN) thin films on a 200 mm large batch furnace platform. AlN is particularly relevant for gallium nitride (GaN)-based power industry, where AlN's wide bandgap, high dielectric constant, and superior thermal conductivity make it an ideal choice for various applications, including UV LEDs, transistors, and micro-electromechanical systems.

The study's focus lies in its ability to maintain extraordinary uniformity across large batches of 200 mm wafers, achieving a thickness variation of less than 0.5 Å. This level of uniformity was obtained by optimizing the ALD process in a reactor capable of handling over 100 wafers, marking a significant achievement in high-volume production environments. The research examined the effects of deposition temperatures, film thicknesses, and different substrate types, including Si, quartz, and GaN/Si(111), on the material and optical properties of the AlN films.

One of the key findings was the identification of an optimal narrow temperature window between 300°C and 350°C for the deposition process, with 350°C being the sweet spot. The study also delved into the nuanced challenges of nucleation on different substrates, revealing that substrate-inhibited growth and a non-linear deposition rate are pivotal factors to consider. This understanding is crucial for maintaining uniformity in extremely thin films, which are sensitive to the underlying substrate's crystal orientation.

From a compositional standpoint, the development showcased the high purity of the AlN films, with negligible carbon and oxygen contamination. This purity is essential for the semiconductor industry, particularly for applications where chemical stability is critical. The study's rigorous material analysis, which included techniques like XPS and TEM, provided in-depth insights into the AlN films' structural and compositional integrity.

Optically, the AlN films demonstrated a bandgap of 5.8 eV, a key attribute for their use in optoelectronic applications. The research also highlighted the refractive index's dependence on film thickness and deposition temperature, offering valuable data for the design and optimization of optical devices.

In summary, this study represents a significant progress in ALD of AlN thin films, combining high throughput with exceptional film uniformity and quality. 

Source: Nucleation of highly uniform AlN thin films by high volume batch ALD on 200 mm platform | Journal of Vacuum Science & Technology A | AIP Publishing

Aalto University in Finland Wins Major Grant for Eco-Friendly Semiconductor Technology

Aalto University, in close collaboration with key industry players including Applied Materials in Finland (Picosun), PiBond, and Volatec, has been awarded a significant grant by Business Finland for their groundbreaking project titled “New chemistries for resource-efficient semiconductor manufacturing”. This initiative is a part of the larger "Chip Zero" Ecosystem, spearheaded by Picosun, aiming to revolutionize the semiconductor industry by developing chips that boast zero lifetime emissions—a first in Finland's tech landscape.

Led by Professors Maarit Karppinen and Antti Karttunen from Aalto's Department of Chemistry and Materials Science, the project seeks to address the pressing environmental concerns associated with semiconductor manufacturing. With the industry's carbon footprint and resource consumption at an all-time high, this co-innovation venture promises to pave the way for more sustainable production methods.

Dr. Ramin Ghiyasi working in the CHEMI-SEMI project holding a silicon wafer after atomic layer deposition, Department of Chemistry and Material Science

The project's goals are ambitious yet crucial. By innovating new chemical processes and materials, the team aims to minimize the environmental impact of semiconductor fabrication. This includes the development of novel, eco-friendly precursors and solvents, enhancing material purification, and advancing recycling practices, as highlighted by Dr. Marja Tiitta from Volatec.

Dr. Thomas Gädda of PiBond emphasizes the importance of collaborative efforts in achieving these sustainability targets, underscoring the project's reliance on a synergy of expertise from academia and industry. This collaborative framework is expected to yield advancements in chemical usage, process optimization, and energy efficiency in semiconductor manufacturing.

With its comprehensive approach, combining experimental research with computational modeling, the project aspires not only to innovate within the confines of semiconductor technology but also to set a new standard for environmentally conscious manufacturing practices in the industry.

Source: Significant Grant for Greener Semiconductor Technology from Business Finland | Aalto University

ASM International: Spearheading Semiconductor Innovation in ALD, Epitaxy, and CVD Markets

ASM International N.V. (Euronext Amsterdam: ASM) yesterday reported its fourth quarter 2023 operating results (unaudited). Double-digit full-year revenue growth, outperforming softer WFE market in 2023

Investor presentation: 2023_q4_investor-presentation.pdf (asm.com)

“2023 was another successful year for ASM. Sales increased by 13% at constant currencies, despite softening market conditions, and marking the seventh consecutive year of double-digit growth.” said Benjamin Loh, CEO of ASM. “Revenue in Q4 2023 amounted to €633 million, in line with our guidance of €600-640 million and down compared to the level in Q4 2022. Revenue in the quarter was supported by strong sales in the power/analog/ wafer segment. Bookings at €678 million were slightly better than our expectation and were driven by GAA pilot- line orders and continued strength in China demand.

ASM's Leadership in the Growing ALD Market

According to ASM, the single wafer Atomic Layer Deposition (ALD) market is experiencing significant growth, with projections indicating an increase from $2.6 billion in 2022 to a range of $4.2 billion to $5.0 billion by 2027. This growth, characterized by a Compound Annual Growth Rate (CAGR) of 10-14% from 2022 to 2027, underscores the expanding role of ALD technology in semiconductor manufacturing. ASM International, a key player in the semiconductor industry, holds a dominant position in this market, commanding a share of over 55% throughout the forecast period.

Please note that this market assessment, most probably originally from TechInsights (prev. VLSI Research) does not include Large Batch furnace ALD, which historically have been about 30% of the total 300 mm ALD equipment market. The leaders in this segment are Tokyo Electron followed by Kokusai and ASM chose not to compete with its A412 ALD product line.

Driving Forces Behind ALD Market Expansion

The expansion of the ALD market is propelled by a series of technological advancements and increasing demands within the semiconductor sector. Key factors contributing to this growth include the industry's shift towards Gate-All-Around (GAA) technology, the necessity for advanced high-k gate dielectrics, and the precision required for threshold voltage tuning. Additionally, the development of sacrificial layers and the use of high aspect ratio Through-Silicon Vias (TSVs) are critical in advancing semiconductor manufacturing techniques. The application of metals and the adoption of selective ALD processes further accentuate the importance of ALD technology in modern semiconductor fabrication.

ASM's Strategic Positioning and Market Opportunities

ASM is well-positioned to capitalize on the opportunities presented by the burgeoning ALD market. The company's strategic emphasis on innovation, coupled with its comprehensive product portfolio, positions ASM as a frontrunner in meeting the evolving needs of the logic/foundry and memory segments of the semiconductor industry. The transition to advanced manufacturing technologies, such as GAA and high-k metal gate applications, presents significant growth avenues for ALD, with ASM at the forefront of this technological evolution.

To be more specific, the transition to GAA technology and the expansion in FinFET applications are set to significantly increase ASM's served available market by approximately US$400 million for every 100,000 wafer starts per month (WSPM). According to ASM, the equipment orders started to come in in the 2nd half of 2023. We can assume that this are orders from Samsung, TSMC and Intel. It is however about peculiar since Samsung had 3 nm GAA going already with yield in August 2023 and ASM is describing it as GAA pilot lines. Anyhow, come 2028 when all leading foundries including Rapidus in Japan are up and running GAAFETs, this additional market will be + USD 1.5 B as compared to if it would have been "only" FinFET technology - according to my back of the envelope calculations. For a company like ASM, with just below USD 3 B (2.6 B EUR) annual Revenue 2023 this is a huge thing. If this is not enough to go woah - add to that the GAAFET market is an upwards moving target and will continue to grow and looking ahead stacking of NMOS/PMOS will drive further demand for this type of ALD and Epi processes.

Expansion into the Epitaxy and CVD Markets

The Silicon Epitaxy (Si epi) market is also on a growth trajectory, with forecasts suggesting it will reach between $2.3 billion and $2.9 billion by 2027. ASM aims for a market share target of over 30%, focusing on both leading-edge and non-leading-edge segments. The leading-edge growth is driven by transitions to GAA technology and advancements in high-performance DRAM, while the non-leading-edge growth is buoyed by wafer power analog and strong momentum from ASM's Intrepid ESA. The epitaxy market is expected to see a Compound Annual Growth Rate (CAGR) of 3-8% from 2022 to 2027, with the leading-edge segment outpacing the overall market with a CAGR of 10-15%.

Regarding the SiC market, the investor presentation highlighted significant growth in power/analog/wafer revenue, almost doubling, primarily driven by robust demand in China. This growth was positively impacted by the consolidation of LPE (SiC Epitaxy), with sales comfortably exceeding the target of more than €130 million in 2023. This indicates ASM's strong performance in the SiC market and its successful integration and expansion in SiC epitaxy, aligning with the broader industry trend towards more advanced and efficient semiconductor materials.

Chemical Vapor Deposition (CVD) technology is another area of focus for ASM, particularly in the context of transitioning to new materials like Molybdenum, which is replacing traditional materials such as CVD Tungsten and PVD Copper in interconnect applications. This shift is indicative of the evolving needs within the semiconductor manufacturing process and highlights ASM's adaptability to changing market dynamics.

In summary, ASM's strategic initiatives in ALD, Epitaxy, and CVD technologies underscore the company's commitment to innovation and leadership within the semiconductor equipment market. Through a combination of market foresight, technological prowess, and strategic investments, ASM is well-positioned to capitalize on the growth opportunities presented by the evolving semiconductor landscape. 

Applied Materials Unveils Cutting-Edge Patterning Technologies for Next-Gen Semiconductor Device Manufacturing

Applied Materials is leading the charge into the angstrom era of chipmaking, unveiling a suite of innovative solutions at the SPIE Advanced Lithography + Patterning conference. The company's focus is on overcoming the challenges posed by extreme ultraviolet (EUV) and high-NA EUV lithography, crucial for the production of chips at 2nm process nodes and below. Their approach integrates new materials engineering, metrology techniques, and pattern-shaping technology to enhance chip performance and yield.

To help overcome patterning challenges for leading-edge chips, Applied Materials offers a portfolio of technologies designed to complement the latest advances in lithography. The company’s newest innovations include the Producer® XP Pioneer® CVD patterning film, the Sym3® Y Magnum™ etch system, the Centura® Sculpta® pattern-shaping system and Aselta contour technology for design-based metrology.

Central to Applied Materials' advancements is the Sculpta® pattern-shaping technology, first introduced at the previous year's conference. Sculpta has seen growing adoption among top logic chipmakers for its ability to refine EUV patterning, notably reducing double patterning steps and mitigating defects such as bridge defects. This technology not only lowers patterning costs but also improves chip yields, showcasing its increasing importance in the semiconductor manufacturing landscape.

Over the next few years, chipmakers will be looking to create “angstrom era” chips that will use EUV and High-NA EUV lithography to pattern their smallest features. An entire ecosystem of capabilities will be required to enable this advanced patterning – including software and design tools, innovations in deposition and etch, advanced metrology and inspection systems, and entirely new approaches such as pattern shaping.

In response to the issue of EUV line edge roughness, Applied Materials has launched the Sym3® Y Magnum™ etch system. This innovative system employs a combination of deposition and etch processes within a single chamber to smooth out rough edges before etching, thereby enhancing yield and chip performance.

Additionally, the company introduced the Producer® XP Pioneer® CVD patterning film, designed for high-fidelity pattern transfer with enhanced resistance to etch chemistries. This film is especially significant for advanced process nodes, offering improved sidewall feature uniformity and co-optimization with both Sculpta and the Sym3 Y Magnum system for superior patterning capabilities.

To address the critical issue of feature alignment across chip layers, Applied Materials has acquired Aselta Nanographics, integrating its design-based metrology with Applied's leading eBeam systems. This integration enables a comprehensive metrology solution that significantly enhances feature placement accuracy, crucial for optimizing chip performance and yield.

Applied Materials' expansion of its patterning solutions portfolio underscores its commitment to advancing semiconductor technology. By addressing key challenges in EUV lithography and introducing groundbreaking technologies, the company is setting new standards for the industry, driving forward the capabilities of angstrom era chipmaking.

Source: Applied Materials Expands Patterning Solutions Portfolio for Angstrom Era Chipmaking | Applied Materials

DOE Invests $4M in Argonne's ALD Tech to Develop Energy-Efficient Semiconductor Devices

The US Department of Energy (DOE) has awarded Argonne National Laboratory a $4 million grant to pioneer research in microchip energy efficiency using Atomic Layer Deposition (ALD). This innovative project, part of the DOE's Energy Efficient Scaling for Two Decades (EES2) initiative, aims to harness the potential of 2D materials, specifically molybdenum disulfide (MoS2), to create microchips that could consume up to 50 times less energy than current models. 

Led by Argonne's Distinguished Fellow Jeffrey Elam, the research team will collaborate with Stanford, Northwestern, and Boise State Universities to develop ALD techniques for fabricating atomically precise MoS2 films. This breakthrough could lead to microchips with integrated memory and logic functions, significantly reducing energy waste and addressing the critical "von Neumann bottleneck" in computing. The project is a step forward in the global effort to enhance computational efficiency and sustainability.

Source: Argonne National Lab gets $4M to develop MoS2 chips - News (compoundsemiconductor.net)

PRiME 2024: A Global Convergence on Atomic Layer Processing Set for Honolulu This October

The PRiME Joint International Meeting, organized by the Electrochemical Society and sister societies from Japan and Korea, will take place from October 6-11, 2024, in Honolulu, Hawaii. Anticipating over 4000 participants, the conference will focus on solid-state science, technology, and electrochemistry. Symposium G01 invites submissions on Atomic Layer Deposition and Etching, covering topics from semiconductor applications to energy storage. The deadline for abstract submission is April 12, 2024. Last year's event saw 78 presentations, indicating a strong interest in the field. For visa, travel information, and participation letters, contact ECS representatives.

Every four years, the PRiME Joint International Meeting is held under the auspices of the Electrochemical Society (ECS), joint with its sister Societies of Japan and Korea.

This fall, PRIME 2024 will be held on Oct. 6-11, 2024 in Honolulu, Hawaii, and is expected to gather over 4000 participants and 40 exhibitors from both academia and industry.

The conference has a strong focus on emerging technology and applications in both solid-state science & technology and electrochemistry.

General information and the Meeting Program can be found here: CALL FOR PAPERS.

The organizers of symposium G01 on “Atomic Layer Deposition & Etching Applications, 20” encourage you to submit your abstract(s) on topics, comprising but not limited to:

1. Semiconductor CMOS applications: development and integration of ALD high-k oxides and metal electrodes with conventional and high-mobility channel materials;

2. Volatile and non-volatile memory applications: extendibility, Flash, MIM, MIS, RF capacitors, etc.;

3. Interconnects and contacts: integration of ALD films with Cu and low-k materials;

4. Fundamentals of ALD processing: reaction mechanisms, in-situ measurement, modeling, theory;

5. New precursors and delivery systems;

6. Optical, photonic and quantum applications; applications aiming at Machine Learning, Artificial Intelligence

7. Coating of nanoporous materials by ALD;

8. Molecular Layer Deposition (MLD) and hybrid ALD/MLD;

9. ALD for energy conversion applications such as fuel cells, photovoltaics, etc.;

10. ALD for energy storage applications;

11. Productivity enhancement, scale-up and commercialization of ALD equipment and processes for rigid and flexible substrates, including roll-to-roll deposition;

12. Area-selective ALD;

13. Atomic Layer Etching (‘reverse ALD’) and related topics aiming at self-limited etching, such as atomic layer cleaning, etc.

FYI: Last year in Gothenburg, our symposium G01 on ALD & ALE Applications 19 attracted a record number of 78 presentations, composing a full 4-day schedule of 66 oral (of which 18 invited), plus 12 poster presentations.

We will traditionally attract more attendants from Far East and expect to be as successful this fall in Hawaii.

Abstract submission

Meeting abstracts should be submitted not later than the deadline of April 12, 2024 via the ECS website: Submission Instructions

Invited speakers

A list of confirmed invited speakers (from North America, Asia and Europe) will soon be available.

Visa and travel

For more information, see: VISA AND TRAVEL INFORMATION

In addition, Mrs. Francesca Spagnuolo at the ECS (Francesca.Spagnuolo@electrochem.org) can provide you with an official participation letter issued by the Electrochemical Society.

For (limited) general travel grant questions, please contact travelgrant@electrochem.org.

We are looking forward to meeting you all at our symposium G01 on ALD & ALE Applications 20, in Honolulu | Oct. 6-12, 2024 !

Symposium organizers:

F. Roozeboom, (lead), University of Twente; e-mail: f.roozeboom@utwente.nl,
S. De Gendt, IMEC & Catholic University Leuven,
J. Dendooven, Ghent University,
J. W. Elam, Argonne National Laboratory,
O. van der Straten, IBM Research,
A. Illiberi, ASM Europe,
G. Sundaram, Veeco,
R. Chen, Huazhong University of Science and Technology,
O. Leonte, Berkeley Polymer Technology,
T. Lill, Clarycon Nanotechnology Research,
M. Young, University of Missouri,
A. Kozen, University of Vermont.